This invention relates to systems and methods of averaging cell mismatches in integrated circuits, such as xe2x80x9cflashxe2x80x9d analog-to-digital converters (ADCs).
Many integrated circuits, such as analog-to-digital converters and digital-to-analog converters, are formed from a plurality of matched cellsxe2x80x94that is, each cell has the same design and, ideally, should have the same operating characteristics. It is well known, however, that slight mismatches in the components of the cells are unavoidable in practical systems, and that such mismatches have an undesirable impact on the operating performance. For example, cell mismatches occurring in a flash ADC may adversely affect the differential nonlinearity and the integral nonlinearity. Differential nonlinearity is a measure of nonuniform step size between adjacent code transitions; integral nonlinearity is a measure of the deviation of the code center line from an ideal straight line drawn through the end points of the transfer characteristic.
Techniques for reducing the impact of cell mismatches in flash ADCs have been proposed. For example, Kattmann (U.S. Pat. No. 5,175,550) has proposed a flash ADC that includes a network of equal-valued resistors each of which is coupled between corresponding points of a pair of adjacent differential input cells of the ADC. Bult (U.S. Pat. No. 5,835,048) has proposed a flash ADC that includes the same resistor network.
In one aspect, the invention features an integrated circuit, comprising a pair of matched cells. Each cell has an active transconductor circuit associated with the cell, wherein the matched cells are coupled together through respective active transconductors. The active transconductors generate currents which are used to average the effect of cell mismatches.
Embodiments may include one or more of the following features.
Each cell may include first and second differential gain stages, an output buffer stage and a latch, with an active transconductor circuit coupled to the output of the second gain stage. The active transconductor circuit associated with each cell may include a differential pair of transistors controlled by the output of the output buffer stage of the associated cell and connected to the output of the second gain stage of the adjacent cells.
As used herein, the term xe2x80x9cactive transconductorxe2x80x9d refers to one or more active circuit components (e.g., transistors) configured to convert a received input voltage into an output current.
In another aspect, the invention features an integrated circuit comprising several matched cells, each having a differential input stage, a gain stage and output buffer stage and a latch, and a transconductor circuit associated therewith, wherein the transconductor circuit of each cell is responsive to the output of the output buffer stage and is coupled to the gain stage of other cells to average the effect of cell mismatches.
Embodiments may include one or more of the following features.
A plurality of additional matched cells each having a differential input stage, a gain stage, an output buffer stage and a latch, and a transconductor circuit associated with each additional cell. The cells may be grouped with each having the associated transconductor circuit responsive to the output of the output buffer stage of that cell and coupled to the output of the second gain stage of the adjacent cells to provide currents to adjacent cells, thereby averaging the effect of cell mismatches. The transconductor circuit of each cell is an active transconductor circuit and may include a pair of differential pairs of bipolar transistors.
Among the advantages of the invention are the following.
The invention substantially reduces the impact of cell matching problems by generating currents to average cell mismatches. Since the transconductor circuit includes active devices, the impedance seen by the output of the preceding output buffer stage is high enough to not appreciably cause a gain attenuation of the gain stage of the cell. Also, by applying the generated currents to the output of the gain stage, rather than to the input stage, the impact of variations in the transconductors is reduced.
Other features and advantages will become apparent from the following description, including the drawings and the claims.